Parallel FFT Implementations on Fixed-Point DSP-Cores with Subword-Parallelism

Fast Fourier transform algorithms are vital in many digital signalprocessing (DSP) applications. In here, both, radix-2 and radix-4 complex fast Fourier transform (FFT) implementations for fixed-point applications, using single instruction multiple data (SIMD) instructions and sub-word parallelism (SWP) is presented. It is shown that data management, and memory access are key to unleashing the arithmetic power of highly parallel digital signal processing (DSP) cores. The presented radix-2 implementation works for unconditioned data with length, N, that are a power of 2, but cannot fully utilize multiply-accumulate (MAC) units. In contrast, the discussed mixed-radix-4 implementation works for pre-conditioned data as found in orthogonal frequency division multiplexing (OFDM) and is customized to length N=256. This leads to near optimal MAC utilization on the TigerSHARCTM.